This invention relates to a novel interconnect structure for an integrated circuit package. More specifically, this invention relates to an interconnect structure for electrically connecting two electronic components and a method of making the same.
In the semiconductor industry, an integrated circuit (IC) device must be connected to a lead frame or some other support structure to produce a complete IC package. Technology has recently produced more powerful devices which can be packaged more densely. However, as the size of the devices has decreased, problems associated with connecting the device to the lead frame or other support structure have arisen.
An integrated circuit is usually fabricated on a semiconductor wafer and has a number of bond pads on the surface of the wafer which connect to various components of the circuit. The bond pads are connected to a wire or some other electrically conductive device to permit utilization of the IC. Two common methods of connecting a device to a lead frame or some other support device are wire bonding and Tape Automated Bonding (TAB).
Wire bonding is a commonly used method of connecting a bond pad to, for instance, a lead frame. Shown in FIG. 1 is a semiconductor die 10 having a plurality of bond pads 12 on its surface. The die sits on a lead frame (not shown) which has a plurality of leads 14 positioned adjacent the die. A bonding machine welds a bonding wire 16 to a bond pad 12 and to a lead 14. This packaging method is acceptable for devices with bond pads which are spaced relatively far apart. However, this method becomes increasingly problematic as the size of the devices and the bond pads decrease because it is difficult to weld such small bond pads with acceptable accuracy. In addition, the materials used are expensive and the bond pad fabrication process is complex. The force applied to the bond pad during welding may damage small dies since the devices become increasingly fragile and sensitive to force and heat as their size decreases. Wire bonding may therefore be difficult to use with small and fragile dies or high density devices.
A new packaging technique known as tape automated bonding (TAB) emerged which does not have some of the limitations of wire bonding. A typical TAB package is shown in FIG. 2 and includes a layer of tape or film 18 having a plurality of conductive leads 20 formed upon it. The leads 20 are connected to a semiconductor die 22 at the ends 24 by means of soldering or by thermocompression welding.
FIG. 3 illustrates a typical cross section of a single TAB lead prior to being connected to a die. Lead 20 is positioned adjacent to a bonding portion of the die 22 prior to connection. To form the leads on the TAB tape (not shown), a copper layer 26 is deposited on the tape and then a second layer 28 of conductive material coats the copper to prevent its oxidation. This second conductive layer is usually composed of tin or gold. Selected portions of the two layers are etched away and the remaining portions form the lead 20. An aluminum bond pad 30 is positioned on the die 22 and is coated with gold to form a bump 31. The gold portions of both the lead and the bonding portion are welded together by a bonding machine.
TAB is more useful than wire bonding for dense packages since no bonding wires are necessary because each lead is bonded directly to a bond pad. The widths of the TAB leads may also be decreased from those used in a wire bonding process. This feature permits a TAB package to be smaller than an analogous wire bonded package.
A disadvantage to TAB packaging is the expense of the materials used. While tin may be used in place of gold, there is a tradeoff between the cost and ease of manufacture, and therefore neither material is ideally suited for TAB. Additionally, there are problems associated with the bonding force and heat, and the yield on TAB packages is therefore not as high as desired if the process is not closely monitored. The force from compression can cause cracks or craters underneath the bond pads, making the device unusable. TAB packaging is an expensive and complex process and illustrates the need for a cost-effective and mass-producible process by which an integrated circuit may be packaged.
The difficulties suggested in the preceding are not intended to be exhaustive, but rather are among many which may tend to illustrate the ineffectiveness of prior art packaging techniques. Other noteworthy problems may also exist; however, those presented above should be sufficient to demonstrate that packaging techniques appearing in the past will admit to worthwhile improvement.